CPU Architecture Quiz

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CPU concepts quiz

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deepa senthil

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CPU Architecture Quiz


Froggy Jumps CPU Architecture QuizVersion en ligne CPU concepts quiz par deepa senthil 1 Which unit of a computer accepts data and instructions? a Output Unit b Input Unit c ALU 2 Which unit performs arithmetic and logical operations? a ALU b Input Unit c Memory Unit 3 Which unit controls all operations inside the computer? a Memory Unit b Control Unit c ALU 4 CPU stands for a Central Processing Unit b Central Program Unit c Computer Processing Unit 5 RAM is an example of a Primary Memory b Secondary Memory c Optical Memory 6 Which memory has the fastest access speed? a DVD b Cache Memory c Hard Disk 7 The register that stores the current instruction is a MAR b IR c PC 8 The Program Counter stores a Result b Current data c Address of next instruction 9 MAR stands for a Main Address Register b Memory Address Register c Memory Access Register 10 MDR stores a Data being transferred b Instructions only c Address only 11 Which bus carries addresses? a Control Bus b Data Bus c Address Bus 12 Which bus is bidirectional? a Control Bus b Data Bus c Address Bus 13 Which bus carries timing and control signals? a Control Bus b Address Bus c Memory Bus 14 Von Neumann architecture stores a Instructions only b Data only c Data and instructions together 15 Which architecture suffers from the Von Neumann bottleneck? a Von Neumann b RISC c Harvard 16 Which register contains the address of memory to be accessed? a MAR b IR c MDR 17 Which register temporarily stores data read from memory? a MAR b MDR c IR 18 RTL stands for a Register Timing Logic b Register Transfer Language c Register Transfer Level 19 The transfer operator in RTL is a = b → c ← 20 Which memory stores programs during execution? a ROM b DVD c RAM 21 Which functional unit is called the brain of the computer? a CPU b Output c Memory 22 Why is cache memory used? a Increase power b Improve processing speed c Increase storage 23 During instruction fetch, the PC content is transferred to a MAR b MDR c IR 24 Which stage follows the Fetch stage? a Interrupt b Store c Decode 25 Which stage performs arithmetic operations? a Store b Fetch c Execute 26 Which component generates control signals? a ALU b Control Unit c Memory 27 Address bus is a Half-duplex b Bidirectional c Unidirectional 28 Performance of a computer mainly depends on a Cabinet b Processor speed c Keyboard 29 Throughput means a Memory size b Amount of work completed per unit time c CPU speed 30 Response time refers to a RAM capacity b Time taken to complete a task c CPU clock 31 In RTL, "P : R2 ← R1" represents a Simple transfer b Simultaneous transfer c Conditional transfer 32 Which register stores intermediate arithmetic results? a PC b Accumulator c IR 33 Single bus structure allows a Unlimited transfers b One transfer at a time c Four transfers simultaneously 34 Main advantage of a single bus structure is a Large memory b Low cost c High speed 35 Which component executes logical operations? a ALU b Memory c CU 36 If PC contains 250, after fetching one instruction it becomes a 248 b 251 c 249 37 During instruction fetch, the instruction finally reaches a PC b IR c MAR 38 Which sequence is correct during fetch? a IR → MAR → PC b MDR → PC → MAR c PC → MAR → MDR → IR 39 Which register receives the result before writing into memory? a MDR b MAR c IR 40 Which bus is used by CPU to send memory locations? a Control Bus b Address Bus c Data Bus 41 If cache memory is removed, system performance will a Decrease b Increase c Remain unchanged 42 Which RTL statement represents data transfer from R1 to R2? a R2 = R1 b R2 ← R1 c R1 → R2 43 Which register identifies the next instruction? a PC b MDR c MAR 44 A bidirectional bus allows a Address transfer only b Instruction storage c Data transfer in both directions 45 Which component compares two values? a Memory b Output Unit c ALU 46 CPU execution time excludes a Arithmetic operations b Instruction execution c I/O waiting time 47 Which bus combines address, data, and control buses? a Internal Bus b System Bus c External Bus 48 Which memory is used for permanent storage? a RAM b Secondary Memory c Cache 49 Which architecture follows the stored-program concept? a Analog b Harvard c Von Neumann 50 Which component synchronizes CPU operations? a Timing Unit (Clock) b ALU c RAM

CPU Architecture Quiz

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CPU Architecture QuizVersion en ligne

par deepa senthil

Which unit of a computer accepts data and instructions?

Which unit performs arithmetic and logical operations?

Which unit controls all operations inside the computer?

CPU stands for

RAM is an example of

Which memory has the fastest access speed?

The register that stores the current instruction is

The Program Counter stores

MAR stands for

MDR stores

Which bus carries addresses?

Which bus is bidirectional?

Which bus carries timing and control signals?

Von Neumann architecture stores

Which architecture suffers from the Von Neumann bottleneck?

Which register contains the address of memory to be accessed?

Which register temporarily stores data read from memory?

RTL stands for

The transfer operator in RTL is

Which memory stores programs during execution?

Which functional unit is called the brain of the computer?

Why is cache memory used?

During instruction fetch, the PC content is transferred to

Which stage follows the Fetch stage?

Which stage performs arithmetic operations?

Which component generates control signals?

Address bus is

Performance of a computer mainly depends on

Throughput means

Response time refers to

In RTL, "P : R2 ← R1" represents

Which register stores intermediate arithmetic results?

Single bus structure allows

Main advantage of a single bus structure is

Which component executes logical operations?

If PC contains 250, after fetching one instruction it becomes

During instruction fetch, the instruction finally reaches

Which sequence is correct during fetch?

Which register receives the result before writing into memory?

Which bus is used by CPU to send memory locations?

If cache memory is removed, system performance will

Which RTL statement represents data transfer from R1 to R2?

Which register identifies the next instruction?

A bidirectional bus allows

Which component compares two values?

CPU execution time excludes

Which bus combines address, data, and control buses?

Which memory is used for permanent storage?

Which architecture follows the stored-program concept?

Which component synchronizes CPU operations?